View CD4076BMS_174047.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

CD4076BMS
December 1992
CMOS 4 -Bit D-Type Registers
Pinout
CD4076BMS TOP VIEW
M N Q1 Q2 Q3 Q4 CLOCK VSS 1 2 3 4 5 6 7 8 16 VDD 15 RESET 14 DATA 1 13 DATA 2 12 DATA 3 11 DATA 4 10 G2 9 G1 DATA INPUT DISABLE
Features
* High Voltage Type (20V Rating) * Three State Outputs * Input Disabled Without Gating the Clock * Gated Output Control Lines for Enabling or Disabling the Outputs * Standardized Symmetrical Output Characteristics * 100% Tested for Quiescent Current at 20V * Maximum Input Current of 1A at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC * Noise Margin (Over Full Package/Temperature Range) - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V * 5V, 10V and 15V Parametric Ratings * Meets All Requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of `B' Series CMOS Devices"
OUTPUT DISABLE
Functional Diagram
DATA INPUT DISABLE G1 9 14 D1 13 D2 12 4D - TYPE FLIP-FLOPS WITH AND-OR LOGIC 4 Q2 5 10 G2 CLOCK 7 1 OUTPUT DISABLE M 2 3 Q1 N
Description
CD4076BMS types are four-bit registers consisting of D-type flip-flops that feature three-state outputs. Data Disable inputs are provided to control the entry of data into the flip-flops. When both Data Disable inputs are low, data at the D inputs are loaded into their respective flip-flops on the next positive transition of the clock input. Output Disable inputs are also provided. When the Output Disable inputs are both low, the normal logic states of the four outputs are available to the load. The outputs are disabled independently of the clock by a high logic level at either Output Disable input, and present a high impedance. The CD4076BMS is supplied in these 16 lead outline packages: Braze Seal DIP Frit Seal DIP Ceramic Flatpack H4T H1E H6W
D3
Q3
11 D4 15 RESET
6 Q4
VSS = 8 VDD = 16
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright (c) Intersil Corporation 1999
File Number
3325
7-1029
Specifications CD4076BMS
Absolute Maximum Ratings
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V (Voltage Referenced to VSS Terminals) Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .10mA Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC Package Types D, F, K, H Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC At Distance 1/16 1/32 Inch (1.59mm 0.79mm) from case for 10s Maximum
Reliability Information
Thermal Resistance . . . . . . . . . . . . . . . . ja jc Ceramic DIP and FRIT Package . . . . . 80oC/W 20oC/W Flatpack Package . . . . . . . . . . . . . . . . 70oC/W 20oC/W o Maximum Package Power Dissipation (PD) at +125 C For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW For TA = +100oC to +125oC (Package Type D, F, K) . . . . . Derate Linearity at 12mW/oC to 200mW Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUP S 1 2 VDD = 18V, VIN = VDD or GND Input Leakage Current IIL VIN = VDD or GND VDD = 20 VDD = 18V Input Leakage Current IIH VIN = VDD or GND VDD = 20 VDD = 18V Output Voltage Output Voltage Output Current (Sink) Output Current (Sink) Output Current (Sink) Output Current (Source) Output Current (Source) Output Current (Source) Output Current (Source) N Threshold Voltage P Threshold Voltage Functional VOL15 VOH15 IOL5 IOL10 IOL15 IOH5A IOH5B IOH10 IOH15 VNTH VPTH F VDD = 15V, No Load VDD = 15V, No Load (Note 3) VDD = 5V, VOUT = 0.4V VDD = 10V, VOUT = 0.5V VDD = 15V, VOUT = 1.5V VDD = 5V, VOUT = 4.6V VDD = 5V, VOUT = 2.5V VDD = 10V, VOUT = 9.5V VDD = 15V, VOUT = 13.5V VDD = 10V, ISS = -10A VSS = 0V, IDD = 10A VDD = 2.8V, VIN = VDD or GND VDD = 20V, VIN = VDD or GND VDD = 18V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND Input Voltage Low (Note 2) Input Voltage High (Note 2) Input Voltage Low (Note 2) Input Voltage High (Note 2) Tri-State Output Leakage VIL VIH VIL VIH IOZL VDD = 5V, VOH > 4.5V, VOL < 0.5V VDD = 5V, VOH > 4.5V, VOL < 0.5V VDD = 15V, VOH > 13.5V, VOL < 1.5V VDD = 15V, VOH > 13.5V, VOL < 1.5V VIN = VDD or GND VOUT = 0V VDD = 20V VDD = 18V 3 1 2 3 1 2 3 1, 2, 3 1, 2, 3 1 1 1 1 1 1 1 1 1 7 7 8A 8B 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1 2 3 LIMITS TEMPERATURE +25oC +125oC -55oC +25oC +125oC -55oC +25oC +125oC -55oC +25oC, +125oC, 55oC +25oC, +125oC, 55oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +125oC -55oC +25oC, +125oC, 55oC 3.5 11 -0.4 -12 -0.4 1.5 4 V V V V A A A MIN -100 -1000 -100 14.95 0.53 1.4 3.5 -2.8 0.7 VOH > VDD/2 MAX 10 1000 10 100 1000 100 50 -0.53 -1.8 -1.4 -3.5 -0.7 2.8 VOL < VDD/2 UNIT S A A A nA nA nA nA nA nA mV V mA mA mA mA mA mA mA V V V
PARAMETER Supply Current
SYMBOL IDD
CONDITIONS (NOTE 1) VDD = 20V, VIN = VDD or GND
+25oC, +125oC, 55oC +25oC, +125oC, 55oC +25oC, +125oC, 55oC +25oC +125oC -55oC
7-1030
Specifications CD4076BMS
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUP S 1 2 VDD = 18V NOTES: 1. All voltages referenced to device GND, 100% testing being implemented. 2. Go/No Go test with limits applied to inputs. 3 LIMITS TEMPERATURE +25oC +125oC -55oC MIN MAX 0.4 12 0.4 UNIT S A A A
PARAMETER Tri-State Output Leakage
SYMBOL IOZH
CONDITIONS (NOTE 1) VIN = VDD or GND VOUT = VDD VDD = 20V
3. For accuracy, voltage is measured differentially to VDD. Limit is 0.050V max.
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS TEMPERATURE 9 10, 11 VDD = 5V, VIN = VDD or GND 9 10, 11 +25oC +125oC, -55oC LIMITS MIN MAX 600 810 200 270 UNITS ns ns ns ns
PARAMETER Propagation Delay Clock to Q Output Transition Time
SYMBOL TPHL TPLH TTHL TTLH
CONDITIONS (Notes 1, 2) VDD = 5V, VIN = VDD or GND
+25oC +125oC, -55oC
NOTES: 1. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 2. -55oC and +125oC limits guaranteed, 100% testing being implemented. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current SYMBOL IDD CONDITIONS VDD = 5V, VIN = VDD or GND NOTES 1, 2 TEMPERATURE -55oC, +25oC +125oC VDD = 10V, VIN = VDD or GND 1, 2 -55 C, +25 C +125oC VDD = 15V, VIN = VDD or GND 1, 2 -55oC, +25oC +125oC Output Voltage Output Voltage Output Voltage Output Voltage Output Current (Sink) VOL VOL VOH VOH IOL5 VDD = 5V, No Load VDD = 10V, No Load VDD = 5V, No Load VDD = 10V, No Load VDD = 5V, VOUT = 0.4V 1, 2 1, 2 1, 2 1, 2 1, 2 +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +125oC -55oC Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1, 2 +125oC -55oC Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1, 2 +125oC -55oC Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1, 2 +125oC -55oC Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1, 2 +125oC -55oC Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1, 2 +125oC -55oC 4.95 9.95 0.36 0.64 0.9 1.6 2.4 4.2 50 -0.36 -0.64 -1.15 -2.0 -0.9 -2.6 mV V V mA mA mA mA mA mA mA mA mA mA mA mA
o o
MIN -
MAX 5 150 10 300 10 600 50
UNITS A A A A A A mV
7-1031
Specifications CD4076BMS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER Output Current (Source) SYMBOL IOH15 CONDITIONS VDD =15V, VOUT = 13.5V NOTES 1, 2 TEMPERATURE +125oC -55 C Input Voltage Low Input Voltage High Propagation Delay Clock to Q Output Propagation Delay Reset VIL VIH TPHL1 TPLH1 TPHL2 VDD = 10V, VOH > 9V, VOL < 1V VDD = 10V, VOH > 9V, VOL < 1V VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V Propagation Delay 3 - State TPHZ TPLZ VDD = 5V VDD = 10V VDD = 15V Propagation Delay 3 - State TPZH TPZL VDD = 5V VDD = 10V VDD = 15V Transition Time TTHL TTLH TTLH VDD = 10V VDD = 15V VDD = 10V VDD = 15V Maximum Clock Input Frequency FCL VDD = 5V VDD = 10V VDD = 15V Minimum Data Setup Time TS VDD = 5V VDD = 10V VDD = 15V Minimum Data Hold Time Reset Pulse Width TW VDD = 5V VDD = 10V VDD = 15V Minimum Clock Pulse Width TW VDD = 5V VDD = 10V VDD = 15V Minimum Data Input SetUp Time TS VDD = 5V VDD = 10V VDD = 15V Maximum Clock Input Rise and Fall Time TRCL TFCL VDD = 5V VDD = 10V VDD = 15V Input Capacitance CIN Any Input 1, 2 1, 2 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 4 1, 2, 4 1, 2, 4 1, 2, 4 1, 2, 4 1, 2, 4 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3, 5 1, 2, 3, 5 1, 2, 3, 5 1, 2 +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC +25oC +25 C +25 C +25oC +25oC +25oC +25oC +25 C +25oC +25oC +25
oC o o o o
MIN 7 3 6 8 -
MAX -2.4 -4.2 3 250 180 460 200 150 300 150 120 300 150 120 100 80 200 80 60 120 50 40 200 100 80 180 100 70 15 5 5 7.5
UNITS mA mA V V ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns MHz MHz MHz ns ns ns ns ns ns ns ns ns ns ns ns s s s pF
+25oC +25 C +25
oC o
Transition Time
+25oC +25oC +25oC +25oC +25
oC
+25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC
7-1032
Specifications CD4076BMS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER NOTES: 1. All voltages referenced to device GND. 2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 3. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 4. CL = 50pF, RL = 1K, Input TR, TF < 20ns. 5. If more than one unit is cascaded, TRCL should be made less than or equal to the sum of the transition time and the fixed propagation delay of the output of the driving stage for the estimated capacitive load. TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current N Threshold Voltage N Threshold Voltage Delta P Threshold Voltage P Threshold Voltage Delta Functional SYMBOL IDD VNTH VTN VTP VTP F CONDITIONS VDD = 20V, VIN = VDD or GND VDD = 10V, ISS = -10A VDD = 10V, ISS = -10A VSS = 0V, IDD = 10A VSS = 0V, IDD = 10A VDD = 18V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND Propagation Delay Time TPHL TPLH VDD = 5V 1, 2, 3, 4 +25oC NOTES 1, 4 1, 4 1, 4 1, 4 1, 4 1 TEMPERATURE +25 C +25oC +25oC +25oC +25oC +25oC
o
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
MIN
MAX
UNITS
MIN -2.8 0.2 VOH > VDD/2 -
MAX 25 -0.2 1 2.8 1 VOL < VDD/2 1.35 x +25oC Limit
UNITS A V V V V V
ns
NOTES: 1. All voltages referenced to device GND. 2. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
3. See Table 2 for +25oC limit. 4. Read and Record
TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25OC PARAMETER Supply Current - MSI-2 Output Current (Sink) Output Current (Source) SYMBOL IDD IOL5 IOH5A 1.0A 20% x Pre-Test Reading 20% x Pre-Test Reading DELTA LIMIT
TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUP Initial Test (Pre Burn-In) Interim Test 1 (Post Burn-In) Interim Test 2 (Post Burn-In) PDA (Note 1) Interim Test 3 (Post Burn-In) PDA (Note 1) Final Test Group A Group B Subgroup B-5 Subgroup B-6 Group D MIL-STD-883 METHOD 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 Sample 5005 Sample 5005 Sample 5005 Sample 5005 GROUP A SUBGROUPS 1, 7, 9 1, 7, 9 1, 7, 9 1, 7, 9, Deltas 1, 7, 9 1, 7, 9, Deltas 2, 3, 8A, 8B, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas 1, 7, 9 1, 2, 3, 8A, 8B, 9 Subgroups 1, 2 3 Subgroups 1, 2, 3, 9, 10, 11 IDD, IOL5, IOH5A READ AND RECORD IDD, IOL5, IOH5A IDD, IOL5, IOH5A IDD, IOL5, IOH5A
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
7-1033
Specifications CD4076BMS
TABLE 7. TOTAL DOSE IRRADIATION MIL-STD-883 METHOD 5005 TEST PRE-IRRAD 1, 7, 9 POST-IRRAD Table 4 READ AND RECORD PRE-IRRAD 1, 9 POST-IRRAD Table 4
CONFORMANCE GROUPS Group E Subgroup 2
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION Static Burn-In 1 Note 1 Static Burn-In 2 Note 1 Dynamic Burn-In Note 1 Irradiation (Note 2) NOTE: 1. Each pin except VDD and GND will have a series resistor of 10K 5%, VDD = 18V 0.5V 2. Each pin except VDD and GND will have a series resistor of 47K 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD = 10V 0.5V OPEN 3-6 3-6 3-6 GROUND 1, 2, 7 - 15 8 1, 2, 8 - 10, 15 8 VDD 16 1, 2, 7, 9 -16 16 1, 2, 7, 9 - 16 3-6 7 11 - 14 9V -0.5V 50kHz 25kHz
M OUTPUT DISABLE N
1 2
*
*
DATA 1 DATA INPUT DISABLE G1 G2 14 9 10
16 D Q 3
VDD
* *
CL Q R
Q1
*
DATA 2
*
13
D
Q 4 Q2
*
CLOCK 7
CL Q R
DATA 3
*
12
D
Q 5 Q3
CL Q R
* ALL INPUTS PROTECTED BY
CMOS PROTECTION NETWORK VDD DATA 4 11
*
D
Q 6 8 Q4 VSS
CL Q R
*
VSS RESET 15
FIGURE 1. CD4076BMS LOGIC DIAGRAM
7-1034
CD4076BMS
TRUTH TABLE DATA INPUT DISABLE RESET 1 0 0 0 0 0 0 0 1 = High Level 0 = Low Level 1 CLOCK X 0 G1 X X 1 X 0 0 X X G2 X X X 1 0 0 X X DATA D X X X X 1 0 X X X = Don't Care NC = No Change NEXT STATE OUTPUT Q 0 Q Q Q 1 0 Q Q NC NC NC NC NC
When either Output Disable M or N is high, the outputs are disabled (high impedance state), however sequential operation of the flip-flops is not affected.
Typical Performance Characteristics
AMBIENT TEMPERATURE (TA) = +25oC AMBIENT TEMPERATURE (TA) = +25oC
OUTPUT LOW (SINK) CURRENT (IOL) (mA)
OUTPUT LOW (SINK) CURRENT (IOL) (mA)
30 25 20 15 10 5
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
15.0 GATE-TO-SOURCE VOLTAGE (VGS) = 15V 12.5 10.0 7.5 5.0 2.5 10V
10V
5V 0 5 10 15 DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
5V 0 5 10 15 DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
FIGURE 2. TYPICAL OUTPUT LOW (SINK) CURRENT CHARACTERISTICS
DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = -5V
FIGURE 3. MINIMUM OUTPUT LOW (SINK) CURRENT CHARACTERISTICS
DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA) AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = -5V -5
0
0 -5 -10 -15
0
0 OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)
-10V
-20 -25
-10V
-10
-15V
-30
-15V
-15
FIGURE 4. TYPICAL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS
FIGURE 5. MINIMUM OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS
7-1035
CD4076BMS Typical Performance Characteristics (Continued)
PROPAGATION DELAY TIME (tPHL, tPLH) (ns) AMBIENT TEMPERATURE (TA) = +25oC 500 TRANSITION TIME (tTHL, tTLH) (ns) AMBIENT TEMPERATURE (TA) = +25oC
400 SUPPLY VOLTAGE (VDD) = 5V 300
200 SUPPLY VOLTAGE (VDD) = 5V
150
200 10V 100 15V
100 10V 50 5V
0
20
40
60
80
100
120
140
0 0
20
LOAD CAPACITANCE (CL) (pF)
40 60 80 100 LOAD CAPACITANCE (CL) (pF)
FIGURE 6. TYPICAL PROPAGATION DELAY TIME vs LOAD CAPACITANCE (CLOCK TO Q)
AMBIENT TEMPERATURE (TA) = +25oC LOAD CAPACITANCE (CL) = 50pF MAXIMUM CLOCK FREQUENCY (fCL MAX) (MHz) 15
FIGURE 7. TYPICAL TRANSITION TIME vs LOAD CAPACITANCE
POWER DISSIPATION PER GATE (PD) (W) 105
8 6 4 2 104 8 6 4 2
AMBIENT TEMPERATURE (TA) = +25oC SUPPLY VOLTAGE (VDD) = 15V 10V 10V 5V
103
10
102
8 6 4 2 8 6 4 2
5
10
8 6 4 2
CL = 50pF CL = 15pF
2 468 2 468 2 468 2 468 2 468 2 468
1 0 5 10 15 20 SUPPLY VOLTAGE (VDD) (V) 10-1 1 10 102 103 INPUT FREQUENCY (f) (kHz) 104
FIGURE 8. TYPICAL MAXIMUM CLOCK INPUT FREQUENCY vs SUPPLY VOLTAGE
tW tW
FIGURE 9. TYPICAL DYNAMIC POWER DISSIPATION vs FREQUENCY
CLOCK tS
50% tS 50% tS
DATA INPUT DIABLE 50% tW RESET 50%
tTHL Q OUTPUT tPHL 90% 50% 10% tPLH
tTLH
tPHL
FIGURE 10. FUNCTIONAL WAVEFORM
7-1036
CD4076BMS
VDD 50% OUTPUT DISABLE tPLZ 10% tPZL 90% 50% VSS VDD VOL VOH 10% tPHZ tPZH VSS
TEST CHARACTER tPHZ tPLZ tPZL tPZH AT D VDD VSS VSS VDD
VOLTAGE AT Q VSS VDD VDD VSS
Q OUTPUT Q OUTPUT
90%
FIGURE 11. FUNCTIONAL WAVEFORM
Chip Dimensions and Pad Layout
Dimensions in parentheses are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (10-3 inch)
METALLIZATION: PASSIVATION:
Thickness: 11kA - 14kA,
AL.
10.4kA - 15.6kA, Silane
BOND PADS: 0.004 inches X 0.004 inches MIN DIE THICKNESS: 0.0198 inches - 0.0218 inches
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. Taiwan Limited 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
1037

▲Up To Search▲

Price & Availability of CD4076BMS

	To Download CD4076BMS Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .